Organic Field-Effect Transistor (OFET) and Lateral Organic Field Effect Transistors (LOFET)

Organic Field-Effect Transistor (OFET) Substrates – Test Chips for Material Characterization

© Fraunhofer IPMS
Diced OFET substrates from Fraunhofer IPMS.

© Fraunhofer IPMS
OFET substrates from Fraunhofer IPMS in a waffle pack.

© Fraunhofer IPMS
OFET measurement setup example.

We offer a wide range of services and chemical sensors for industry and science

Standard and customized OFET substrates for your organic materials
Measuring adapter and deposition masks/shadow masks
Waffle pack and wafer size (diced)
Industrial technology supplier
OFET RnD Expertise for over 10 years
Testing and Application partner

For Semiconductors and conductors we offer highly reproducible measurements of:

Conductivity
Carrier mobility
On/Off current ratio
Influence of annealing and solvent
Determination of contact resistance

Example OFET substrate design

n-doped and backgated OFET substrates
16 transistors per chip with different channel sizes
large channel width (W = 2.5 ... 20 µm, L = 10 mm)
High reproducibility
Gate oxide starting at 28 nm for low voltage

Applications for organic field effect transistors (OFET)

© Fraunhofer IPMS
Organic field effect transistors (OFET) design principle.

OFETs are used for various applications, including flexible displays, smart sensors, organic photovoltaics and printed electronics.

Silicon-based OFET substrates provide a high-precision patterned foundation for the fabrication of organic field-effect transistors (OFETs) and allow the deposition of organic semiconductor layers that determine the electronic properties of the OFET. The resulting OFETs can be flexibly designed due to the adaptability of the materials as well as source and drain contacts.

Due to their reliability and reproducible preparation, these substrates are used worldwide by all major developers of organic semiconductor materials as part of standardized material monitoring.

The Si bulk acts as gate electrode and controls the current flow between the source and drain gold electrodes. A suitably doped Si-SiO2 interface in CMOS quality guarantees a reproducible gate contact. The gold electrodes with patented adhesive layer suppress the formation of injection barriers between the gold electrodes and the organic in the transistor channel, even for p-type semiconductors, so that reliable ohmic source / drain contacts are formed in the back-gated OFET.

In the standard layout, 60 chips of size 15 × 15 mm² each with a total of 960 individual transistor structures are realized on 200 mm wafers. Each chip contains four groups of four identical transistors with channel lengths of 2.5, 5, 10 and 20 µm. Identical layouts with graduated channel widths as well as the flexible choice of oxide thickness allow adaptation to a wide voltage and conductivity range of the materials under investigation. Customized layouts with modified electrode geometry are possible at any time.

Organic Field-Effect Transistor (OFET) Knowledge Base

The performance of the transistors is influenced by various factors, including the capacitance of the dielectric, charge carrier mobility, contact resistance and conductivity. The optimal tuning of these factors is crucial for the development of high-performance OFETs, and thorough characterization of these parameters is necessary to enhance the performance and reliability of these devices.

Dielectric Capacitance

The capacitance of the dielectric in an OFET directly influences the extent of charge accumulation at the interface to the organic semiconductor. A higher capacitance dielectric allows for more efficient charge accumulation at a given gate voltage, leading to higher conductivity in the channel. This improves the overall performance of the OFET, including switching frequency.

Charge Carrier Mobility

The mobility of charge carriers is a measure of how easily electrons or holes can flow through the semiconductor channel. Higher mobility leads to a faster response of the OFET to changes in gate voltage and improves performance in high-frequency applications. Mobility can be influenced by the choice of organic material, processing, and the microstructure of the semiconductor.

Contact Resistance

The contact resistance between the electrodes and the organic semiconductor plays a crucial role in efficient charge injection and extraction. High contact resistance can lead to voltage drops that impair the performance of the OFET, especially at low operating voltages. Optimizing electrode materials and interface treatment can reduce contact resistance.

Conductivity

The conductivity in the semiconductor channel is crucial for the overall performance of the OFET. It is determined by the density of charge carriers and their mobility. Higher conductivity allows for more efficient charge transport and improves the electrical performance of the OFET.

Characterization of Organic Field-Effect Transistors

Two primary types of measurements are commonly used: the transfer characteristics and the output characteristics. Each provides important information about the behavior and performance of the OFET. These characteristics are crucial for determining the operational parameters of OFETs and for understanding how changes in the structure and materials of the OFET affect its performance. They are fundamental tools used in the design and optimization of OFET-based devices.

Transfer Characteristics

The transfer characteristic graph of an OFET is obtained by plotting the drain current (I_DS) against the gate voltage (V_GS) while keeping the drain voltage (V_DS) constant. This graph helps in understanding how the gate voltage controls the conductivity of the semiconductor channel.

Threshold Voltage (V_DS_threshold): This is the gate voltage at which the transistor starts to turn on. Below this voltage, the drain current is minimal and described as the off-state.
Subthreshold Slope: This slope indicates how effectively the transistor can be turned off. A steeper slope means better switching behavior.
On/Off Current Ratio: This ratio measures the difference in current flow between the on state and the off state. Higher ratios are generally desirable for better transistor performance.

Output Characteristics

The output characteristic graph of an OFET is generated by plotting the drain current (I_DS) against the drain voltage (V_DS) for different fixed values of the gate voltage (V_GS). This graph shows how the drain current varies with the drain voltage, providing insight into the behavior of the OFET under different operating conditions.

Saturation Region: When V_DS is large enough that increasing it further does not significantly increase I_DS, the transistor is said to be in saturation. The current levels off, indicating that the maximum channel conductivity has been reached for the given V_GS.
Linear Region: When V_DS is small and increases in V_DS lead to proportional increases in I_DS, the OFET operates in the linear region. This behavior is similar to that of a resistor.

Deposition and Handling

The most common materials for OFETs are organic polymers or small molecules. For use in applications, these materials are applied to substrates such as glass, plastic, or paper.

Testing Materials with Substrates

1. Material Selection: the organic material that has the desired electrical properties must be selected.

2. Substrate Preparation: The substrate must be clean and free of contaminants. It may be necessary to treat the substrate to improve the adhesion of the organic material.

3. Applying the Material: The organic material can be applied to the substrate using various methods

Chemical Vapor Deposition (CVD)
Spray-coating
Spin-coating
Dip-coating
Dispensing
Physical Vapor Deposition (PVD)
Printing
Sputtering

4. Characterization: After manufacturing the OFET, tests are conducted to measure the electrical properties such as charge carrier mobility, threshold voltage, and current on/off ratio.

Storage

Please store the wafers at a cool and dark place and protect them against sun. Storage temperature: between 15°C and 25 °C.

Recommendation for resist removal

Step 1: Keep the OFET under purified acetone for 15 minutes covered with a lid. Avoid scratching of OFET substrates with one another thus preventing damage to the gold structures.
Step 2: Remove the chips after the 15 minutes from acetone and rinse them immediately with IPA, to keep them wet after Acetone treatment. Then blow drying them with Nitrogen 5.0 to prevent the stains from drying.
Step 3: Put the substrates into a new Acetone bath for further 5 minutes.
Step 4 : The OFET substrates are then individually taken out of the acetone bath and rinsed immediately (keep them wet !) with IPA before blow drying with Nitrogen 5.0.
Step 5: Keep the substrates for 10 min under purified IPA.
Step 6 : Transfer the OFET samples into a clean beaker with purified IPA and subjected to ultrasonic bath for 5 minutes (at 60 °C). The ultrasonic bath makes sure the resist particulates which were left behind from previous steps naturally fall off during the process leaving behind a clean OFET substrate. Care should be taken when handling the substrates after cleaning to prevent any damage or contamination of the transistor structures. Follow the safety instructions by using ultrasonic bath in combination with IPA !
Step 7 : After the ultrasonic treatment, the substrate with OFET samples should be cleaned with deionized water followed by blow drying with Nitrogen 5.0

Reference from customers using our substrates

Towards implementation of logic circuits based on intrinsically reconfigurable organic transistors

Recent publications by Fraunhofer IPMS

T. Stoppe, A. Graf, T. Ludewig, O. Hild: Characterization of Organic Semiconductors and Conductors by Means of Conductivity and Field Effect Using the Example of Graphene.
T. Stoppe, A. Graf, O. R. Hild: Electrical characterization of silicon-based OFET substrates spray coated with water-based graphene solution

Lateral Organic Field Effect Transistors (LOFET)

LOFET waferstack — © Fraunhofer IPMS
LOFET structure.

Another step to simplify material characterisation is the analysis of basic logic circuits. For this purpose, up to 36 individual transistors are connected to form inverter and ring oscillators. Monitoring the active materials then only requires a frequency measurement of the ring oscillators, which can be automated with little effort. The much more time-consuming measurement and evaluation of the individual transistor characteristics can be omitted. Furthermore, one not only obtains reliable information on the logic capability, but at the same time determines the dynamic properties of the inverters.

The available layout of the logic circuits includes a first block with eleven individual transistors, which enables a complete parameter extraction for the circuit simulation. A second block contains four inverters, which are identically found in the oscillator stages. These separately accessible inverter stages allow a detailed analysis of the transient behaviour in case the amplification of the individual inverter stages is not sufficient for the ring oscillators to start oscillating. The third block contains ring oscillators with seven or fifteen stages. Each ring circuit has a three-stage output amplifier that decouples the oscillation in the ring from the output, as well as allowing direct frequency measurement without external amplification.

The LOFET substrates are also realised in bottom-gate architecture, so that after deposition of the semiconductor layer on the chip, functional circuits are available.

Organic Field-Effect Transistor (OFET/LOFET)